AMD has confirmed that its next-gen EPYC Venice CPUs, based on the Zen 6 architecture, are made on TSMC’s bleeding edge 2nm process node, N2.
AMD Partners With TSMC: 6th Gen EPYC Venice “Zen 6” CPUs on N2 “2nm” Process Node & 5th Gen EPYC CPUs Validated at TSMC Arizona
In a ground-breaking announcement, AMD has announced its long-term partnership with TSMC in the manufacturing of its next-generation EPYC CPUs using the latest fabrication technologies and process nodes.
In the official press release, AMD confirms that its next-gen EPYC CPUs, codenamed 6th Gen Venice, will be the first HPC product in the industry to be taped out and brought up using TSMC’s N2 process technology, also known as 2nm. TSMC will be leveraging NanoSheet technology for its 2nm process node and these chips will be co-optimized with new design architectures such as the Zen 6 and Zen 6C. These chips are planned for launch next year.
In addition to the next-gen EPYC announcement, AMD also states that it has successfully brought up and validated its 5th Gen EPYC CPUs at TSMC’s Arizona Fab 21. This is a major milestone for the United States, which has been pushing towards in-house fabrication and production of the latest chips.
Press Release: AMD today announced its next-generation AMD EPYC processor, codenamed “Venice,” is the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2nm (N2) process technology. This highlights the strength of the AMD and TSMC semiconductor manufacturing partnership to co-optimize new design architectures with leading-edge process technology. It also marks a major step forward in the execution of the AMD data center CPU roadmap, with “Venice” on track to launch next year. AMD also announced the successful bring up and validation of its 5th Gen AMD EPYC CPU products at TSMC’s new fabrication facility in Arizona, underscoring its commitment to U.S. manufacturing.
“TSMC has been a key partner for many years and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently deliver leadership products that push the limits of high-performance computing,” said Dr. Lisa Su, chair and CEO, AMD. “Being a lead HPC customer for TSMC’s N2 process and TSMC Arizona Fab 21 are great examples of how we are working closely together to drive innovation and deliver the advanced technologies that will power the future of computing.”
“We are proud to have AMD be a lead HPC customer for our advanced 2nm (N2) process technology and TSMC Arizona fab,” said TSMC Chairman and CEO Dr. C.C. Wei. “By working together, we are driving significant technology scaling, resulting in better performance, power efficiency, and yields for high-performance silicon.”
“We look forward to continuing to work closely with AMD to enable the next era of computing.”
