Renesas has developed a new MOSFET wafer manufacturing process (REXFET-1) that enables the new devices to reduce on-resistance by 30 percent.
The REXFET-1 process also enables the new MOSFETs to offer a 10 percent reduction in Qg characteristics (the amount of charge needed to apply voltage to a gate), and a 40 percent reduction in Qgd (the amount of charge that needs to be injected into the gate during the “Miller Plateau” phase).
The devices are available in industry-standard TOLL and TOLG packages that are pin-compatible with devices from other manufacturers, and 50 percent smaller than traditional TO-263 packages. The TOLL package also offers wettable flanks for optical inspection.
The MOSFETs are available in production volumes today. Renesas is also offering a reference design with an application note to help customers shorten design cycles.
